overview GA3220 is a system-in-a-package (sip) signal processing platform specifically designed for hearing instruments which require high precision processing and ultra low power consumption. the platform delivers high-performance audio processing with superior power efficiency enabling the implementation of advanced hearing instrument algorithms such as next generation adaptive noise reduction and environmental classification algorithms. the GA3220 platform is comprised of three chips as illustrated in figure1. the gc5002 dsp chip contains both programmable instruction set dsp cores and high performance hard- wired co-processors. it provides extensive computational capability without compromising battery life. the unique architecture of the gc5002 simultaneously offers the flexibility of a programmable platform and the performance of hard-wired design. the chip utilizes a distributed and re-configurable architecture which enables hardware scalability and ensures minimum power consumption while implementing advanced signal processing algorithms. the second chip, gc5055, is a programmable high fidelity audio codec designed specifically for digital hearing instrument applications. this chip provides industry-standard interfaces for transducers, switches, volume controls and programmer boxes. it also provides serial communication ports for interfacing with third-party dsp chips and serial eeproms. the GA3220 platform employs thinstax advanced packaging technology which makes it incredibly compact and suitable for cic instruments. benefits the most versatile sip platform - fits into any shell size from cic to bte single programmable platform enables product implementation for different market segments reduced product development and manufacturing costs for oems through product consolidation improved time-to-market and fast response to changing market needs re-configurable and distributed processing architecture allows easy product enhancements and provides full computational power scalability flexible architecture enables easy integration of a third party ip-block (e.g., proprietary feedback cancellation or directional processing to the system) hearing instrument-centric instruction set based dsp allows oems to implement any proprietary algorithms and provide extensive processing power to support any leading-edge algorithm 0.13u silicon technology facilitates high- end product implementation without sacrificing good battery life state of the art analog chip design and high precision digital processing ensures the highest sound quality fully integrated development environment (guide) provides fast and easy development continued on other side figure 1 GA3220 GA3220 programmable signal processing platform for hearing instruments
hipinfo@gennum.com www.gennum.com tel: +1 (905) 632-2996 fax: +1 (905) 632-2814 features cic size package (hybrid size < 215x124x69 mil) ultra low power architecture 256k spi eeprom system memory complete integrated development kit (guide) supports development from concept to final product programmable and re-configurable gc5002 dsp chip - leading edge 0.13 technology - as low as 0.04mw/mmac average power consumption for the programmable blocks ( dsp and filter engines) - 42mips processing power at 2mhz - a programmable main dsp for system configuration and control - four programmable, dual-mac dsps for numerically intensive operations - four custom programmable filter engines optimized for digital filtering operations system overview mdsp (controller) pre- processing block post- processing block mux adc adc dac eeprom interfaces i2s spi pcm debug sda gpio time domain cluster frequency domain cluster input cluster output cluster dsp tdfb dsp fft/ifft dsp feng dsp feng fbc feng feng ocl - task specific hardware accelerators for common audio processing tasks (fft/ifft, feedback canceller, ocl and time domain filter bank ) - 10.7k words of data ram and 7.7k words of program ram. - programmable on-chip clock frequency between 2mhz and 10mhz. - 20 bit audio precision - power saving sleep modes - general purpose i/o port for application development or custom applications - debug port supports in-circuit emulation (ice) hi-fidelity gc5055 codec chip - 0.18u technology - dual a/ds, d/a - 95 db input dynamic range - 83 db output dynamic range - programmable sampling between 8-48khz - frontwave? directional processing - four analog inputs (fmic, rmic, tcoil, direct audio input-dai) - internal/external volume control - agc-o and tone generation - drives zero-bias 2-terminal receivers features continued 2004 gennum corporation. printed in canada
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